SRAM NVM DFT Technologist

Your Job:

• Own developing the engineering solutions for testing verifying and validating post-silicon memory test solutions (from characterization to HVM).
• Define and deploy end-to-end test architecture from design insertion through silicon validation covering all aspects of SRAM / NVM technologies including but not limited to MRAM and RRAM.
• Develop and optimize SRAM / NVM testing balancing coverage test time and yield learning.
• Customize testing solutions to balance customer quality and test cost goals.
• Own post-silicon test planning including validation vectors ATE correlation and silicon bring-up strategies.
• Interface closely with design verification product engineering and ATE teams to ensure smooth handoff from simulation to tester.
• Develop automated test programs and diagnostic scripts supporting wafer sort package test and system-level characterization.
• Analyze silicon test data for root-cause isolation yield improvement and continuous methodology refinement.
• Document test specifications qualification methodologies and re-use frameworks for ongoing improvement.

Other Responsibilities:

• Coaches and mentors less experienced staff; influences others as a technical leader.
• Familiarity with reliability testing and failure analysis specific to NVM devices.
• Perform all activities in a safe and responsible manner and support all Environmental Health Safety & Security requirements and programs

Required Qualifications:

• Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field.
• 15 years of hands-on experience across silicon lifecycle DFT design implementation validation and post-silicon characterization to HVM.
• Expert in MBIST / NVM testing is a must with a proven record of driving EDA vendor improvements and engaging with customers to debug silicon issues.
• Practical experience with post-silicon silicon debug ATE vector bring-up (e.g. Teradyne Advantest) and yield analysis.
• Ability to correlate pre-silicon and production test environments including diagnostic log analysis and tester pattern debug.
• Proficiency with major EDA tools (Synopsys Cadence Siemens/Mentor) and scripting (Python Perl TCL).
• Strong understanding of test coverage metrics fault simulation and data-driven test improvements.
• Excellent technical leadership planning and communication skills across cross-functional teams.

Preferred Qualifications:

• Strategic thinker who understands full-lifecycle testfrom design to production ramp.
• Innovative leader who drives collaboration between design EDA fab and product engineering.
• Passionate about test time reduction yield learning and driving cost-effective test solutions.
• Continuous learner who proactively evaluates tools methods and automation opportunities.

Expected Salary Range

The exact Salary will be determined based on qualifications experience and location.