Sr. Principal Foundry Interface Engineer
Job Location:
Santa Clara County, CA - USA
Yearly Salary:
Posted:
Application Deadline:
Vacancies:
Job Summary
About SiTime
SiTime is the Precision Timing company.
Timing is the heartbeat of all electronics ensuring performance resilience and scalability. For decades quartz devices non-silicon technology have kept systems in sync but they struggle in harsher more demanding environments. MEMS-based Precision Timing delivers greater accuracy smaller size and resilience. Today MEMS timing powers over 400 applications including high-growth ones in AI datacenters automated driving industrial and humanoid robots wearables and IoT.
Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance smaller size lower power and better reliability. With more than 4 billion devices shipped SiTime is changing the timing industry. For more information visit:.
Job Summary
In this role the candidate will support Foundry technical interface for SiTime. The key responsibilities include the following.
It is not necessary to meet all job requirements to be a qualified candidate for the position.
Responsibilities:
- Lead Foundry yield improvement through mitigation of systematic and parametric yield detractors
- Manage Foundry yield excursion and implementation of Continuous Improvement Plan.
- Manage Foundry safe launch
- Provide technical guidance on Foundry Fab transfer projects
- During development direct wafer lot progress process skew splits and DOE strategies
- Support device performance analysis for mixed signal devices.
- Manage compliance with fab yield E-test WAT inline Cp/CpK metrics
- Experience with AI/ML predictive modeling to improve projection accuracy for test chips and high-volume products including correlation of inline process metrics with end-of-line yield and performance is a plus.
- Serve as technical liaison to the Foundries communicate status of process health monitors to internal stakeholders drive on time wafer out from the fab continuous improvement deliverables and resolution of critical technical escalations.
Qualifications & Requirements:
- Minimum requirements are a Masters degree with 13 years of experience or a PhD with 10 years of industry experience in a relevant engineering or physical-science field including Semiconductor Process Integration Device Engineering or Wafer Yield Engineering.
- English proficiency is required including the ability to effectively communicate collaborate and perform job responsibilities in a professional business environment.
- Proven track record in yield pareto construction modeling projection and the development of long-term yield roadmaps.
- Experience in using PDF Exensio or other Big Data Analysis tools.
- Extensive experience collaborating with foundries.
- Experience in porting between fabs.
- Expertise in interpreting complex product data (inline e-test and SORT) to drive organization-wide solutions.
- Deep knowledge of semiconductor wafer inline inspection methods and SORT programs.
- Deep knowledge of semiconductor device reliability
- Well versed with DFM techniques and PFMEA
- Experience in supporting semiconductor wafer fulfillment for products that require to meet Automotive AECQ100 ISO 26262 standards.
- Strong Leadership and ability to set standards and drive to targets.
- This position requires clear accurate and timely communication both written and verbally.
- Strong attention to detail project management and organization skills and ability to manage multiple projects at the same time in a fast-paced environment with minimal supervision.
Desired Characteristics & Attributes:
- Strong team worker within multi-disciplinary and multi-cultural environments. Show inherent sense of urgency and accountability.
- Excellent communication presentation interpersonal and team-work skills.
- Highly motivated self-starter with a can-do attitude out-of-the-box thinking with a willingness to take informed risks to achieve organization goals.
Compensation Range:
At SiTime we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.
The annual base salary range for this role is $169470 $242360. The final offer is determined by factors such as location experience education and training.
In addition to base salary this role is eligible for a quarterly bonus tied to the achievement of innovation goalsreflecting our commitment to recognizing meaningful impact. We also offer equity grants providing a meaningful opportunity to share in the companys future growth and success.
Benefits offered: 401k plan health and wellness that includes medical dental vision life parental leave legal services and time off plans.
SiTime is anEqual Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics including race color religion national or ethnic origin sex sexual orientation gender identity or expression age disability pregnancy political affiliation protected veteran status protected genetic information or marital status or other characteristics protected by law. SiTime participates in theE-Verifyprogram.
Learn More about SiTime:Review theGet to Know SiTimesection of our career page to explore our culture values and what makes us unique.
- Innovation on Top Philosophies of Innovation with Rajesh Vashist
- Fabrication Knowledge An Interview with Rajesh Vashist
- SiTime Corporation YouTube
Required Experience:
Staff IC
About Company
SiTime is a leader in MEMS timing solutions, having shipped billions of units. Learn about our silicon MEMS oscillators, TCXOs, OCXOs, MEMS resonators, clock generators, jitter cleaners, clock timing, timing clock, sitm stock, and much more.
