Sr. Manager Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

AWS Utility Computing (UC) provides product innovations from foundational services such as Amazons Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2) to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization youll support the development and management of Compute Database Storage Internet of Things (IoT) Platform and Productivity Apps services in AWS including support for customers who require specialized security solutions for their cloud services.

We are seeking an experienced Sr. Physical Design STA Engineer to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; were handling massive scale and rapid integration of emergent technologies.

As a member of the Cloud-Scale Machine Learning Acceleration team youll be responsible for the design and optimization of Hardware in our data centers including technologies such as AWS Inferentia which is a machine learning inference product designed to deliver high performance at low cost.

Youll provide leadership in the application of new technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced intellectually challenging position and youll work with thought-leaders in multiple technology areas. Youll have relentlessly high standards for yourself and everyone you work with and youll be constantly looking for ways to improve our products performance quality and cost. Were changing an industry and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities

Develop & maintain flows for block and full-chip level static timing analysis
Write debug & validate timing constraints for blocks and full-chip.
Run Static Timing Analysis and give frequent feedback to team members and leads.
Provide guidance on how to fix timing issues (generate ECOs fix constraint issues).
Develop scripts to automate running timing analysis and generate reports.
Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams


About the team
Utility Computing (UC)
AWS Utility Computing (UC) provides product innovations from foundational services such as Amazons Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2) to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization youll support the development and management of Compute Database Storage Internet of Things (IoT) Platform and Productivity Apps services in AWS including support for customers who require specialized security solutions for their cloud services.

Inclusive Team Culture
Here at AWS its in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences inspire us to never stop embracing our uniqueness.

Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home theres nothing we cant achieve in the cloud.



- 7 years of ASIC implementation synthesis STA and physical design in deep sub-micron nodes (16nm or smaller) experience
- 7 years of digital design in communication systems experience
- 7 years of full-custom analog or RF layout experience
- 7 years of wireless communications systems and implementation experience
- 8 years of creating and maintaining automation frameworks for Post-Silicon Flow experience
- 7 years of verification in communication systems experience
- 5 years of UVM C System C and scripting experience
- 3 years of emulation experience
- Bachelors degree in Electrical Engineering or a related field
- Knowledge of UVM and Matlab
- Knowledge of implementing chips with multiple power islands and power gating
- Knowledge of multiple access systems including OFDMA TDMA and CDMA
- Knowledge of end-to-end network system architecture from wireless physical layer to application endpoints
- Knowledge of serial protocols including SPI I2C I3C and UART
- Knowledge of Python and Embedded C programming
- Experience in communication theory OFDM MIMO Digital/Wireless Communication Systems or RF engineering
- Experience with current and upcoming RF standards in cellular (4G/5G) WiMAX 802.11ad microwave backhaul DVB-S2 / DVB-C or related broadband wireless standards
- Experience leading or solely developing methodology and scripts for physical synthesis
- Experience taping out chips that have gone into high volume production
- Experience developing products for volume production
- Experience low power design techniques
- Experience delivering products to volume production
- Experience in modem L1/L2 algorithms development and architectures
- Experience in developing link and system level simulators using MATLAB Python or C
- Experience in test setup automation using MATLAB Python or Pearl
- Experience with Agile TDD BDD CI and Git
- Experience developing PHY/MAC layer HW/SW targeting SoCs FPGAs and general-purpose processors
- Experience leading technical initiatives and key deliverables
- Experience with version control systems and CI/CD pipeline implementation
- Experience in Bare Metal Environment development including linker scripts page tables and NVIC
- BS 8yrs or MS 6yrs or PhD 4yr in EE/CS
- Expertise in timing analysis fundamentals
- 3 years doing Static Timing Analysis
- 3 years with timing constraint development
- Timing Analysis using EDA tools (examples: PrimeTime Tempus or others)
- Understanding of ASIC Physical Design from RTL-to-GDSII
- Understanding of other sign-off activities (ir/em physical verification DFT)

- Masters degree or Ph.D. degree in Electrical Engineering or related field
- Experience in RTL coding and debug as well as performance power area analysis and trade-offs
- Experience with modern ASIC/FPGA design and verification tools
- Experience with SOC bring-up and post-silicon validation
- Expertise developing flows using STA tools (examples: PrimeTime Tempus or others)
- Expertise in ECO flows (examples: PT-DMSA Tempus-ECO Tweaker or others)
- Experience in advanced nodes - 16nm or below
- Expertise in parasitic extraction tools (examples: STAR-RC Quantus or others)
- Expertise on circuit level analysis using tools like SPICE / SPECTRE
- Experience with timing of IO interfaces like DDR HBM PCIe Die-to-Die etc.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status disability or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees supervisors and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees supervisors and staff to ensure exceptional customer service; and follow all federal state and local laws and Company policies. Criminal history may have a direct adverse and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above as well as the abilities to adhere to company policies exercise sound judgment effectively manage stress and work safely and respectfully with others exhibit trustworthiness and professionalism and safeguard business operations and the Companys reputation. Pursuant to the Los Angeles County Fair Chance Ordinance we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process including support for the interview or onboarding process please visit for more information. If the country/region youre applying in isnt listed please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience qualifications and location. Amazon also offers comprehensive benefits including health insurance (medical dental vision prescription Basic Life & AD&D insurance and option for Supplemental life plans EAP Mental Health Support Medical Advice Line Flexible Spending Accounts Adoption and Surrogacy Reimbursement coverage) 401(k) matching paid time off and parental leave. Learn more about our benefits at CA Cupertino - 239600.00 - 324100.00 USD annually