Signal Integrity Engineer – Memory Interface
Job Location:
Job Location:
San Diego, CA - USA
Monthly Salary:
Not Disclosed
Monthly Salary:
Posted on:
9 hours ago
Posted on:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
In this position you will work with the team that develops SOCs used within Apples mobile devices. You will be specifically responsible for memory interface signal integrity for Apple SoCs covering the span from package to board.
You will work on electrical and physical design of memory systems n Work on electrical extraction and validation of package and MLB n Work with circuit and controller team to optimize memory system design n Work on SI and PI modeling simulation and characterization memory interface n Develop and execute test plans to validate signal and power integrity n Work with product engineering and system engineering to debug and to improve product yield
Conduct end-to-end signal integrity and power integrity simulation studies of memory system including modeling of channels and power delivery networks of die/interposer/PKG/PCB/PMU to meet tight timing and voltage feedbacks and guidelines to silicon floorplan package system design and other cross-functional optimal IO settings and design guideline to cross-functional feasibility study for next generation of signaling correlation between simulation and silicon measurement.
Minimum requirement of a bachelors degree
MSEE 5 years of industry experience and or are looking for someone who is familiar with signal and power integrity issues of memory experience working with actual product package/board design and analysis PI/SI methodology development and lab correlation/validation of the simulation academic with lab equipment such as: VNA TDR real-time scope spectrum analyzer fundamentals in 3D/2D EM simulation tools and transmission line in Python with strong foundational coding skills and expertise in leveraging generative AI coding assistants to enhance productivity.
You will work on electrical and physical design of memory systems n Work on electrical extraction and validation of package and MLB n Work with circuit and controller team to optimize memory system design n Work on SI and PI modeling simulation and characterization memory interface n Develop and execute test plans to validate signal and power integrity n Work with product engineering and system engineering to debug and to improve product yield
Conduct end-to-end signal integrity and power integrity simulation studies of memory system including modeling of channels and power delivery networks of die/interposer/PKG/PCB/PMU to meet tight timing and voltage feedbacks and guidelines to silicon floorplan package system design and other cross-functional optimal IO settings and design guideline to cross-functional feasibility study for next generation of signaling correlation between simulation and silicon measurement.
Minimum requirement of a bachelors degree
MSEE 5 years of industry experience and or are looking for someone who is familiar with signal and power integrity issues of memory experience working with actual product package/board design and analysis PI/SI methodology development and lab correlation/validation of the simulation academic with lab equipment such as: VNA TDR real-time scope spectrum analyzer fundamentals in 3D/2D EM simulation tools and transmission line in Python with strong foundational coding skills and expertise in leveraging generative AI coding assistants to enhance productivity.
Required Experience:
IC
About Company
Ask Siri to name the most successful company in the world and it might respond: Apple. And it's not just out of familial pride. Apple consistently ranks highly in profit, revenue, market capitalization, and consumer cachet. In 2018, the company became the first reach a trillion dollar ... View more
