SerDes System Validation Engineer

We are looking for a SerDes System Validation Engineer to lead system validation of mixed-signal SerDes this highly visible role you will actively work within Analog-Mixed/Signal design team and participate in validation and debug of embedded circuits; collaborating with many teams to enable the worlds premiere products. You will closely work with a hard-working group of Analog-Mixed/Signal designers working diligently to deliver hard IPs to Apples products while exceeding the highest expectations of quality innovation and Apple we work every day to craft products that enrich peoples doing so we face exciting challenges driven by the increasing complexity of SoC and PHY design. If you have strong technical fundamentals and a proven record of tackling complex problemsfueled by curiosity a passion for learning and a desire to enhance the impact of your workwed love to hear from you thrive on understanding the bigger picture while diving deep into the details to innovate and find elegant solutions. You enjoy collaborating with diverse teams to achieve extraordinary results maintaining a strong team spirit even when facing tough challenges. Most importantly you care about society and demonstrate leadership through your commitment to meaningful have an opportunity for a forward-thinking and especially hardworking system validation engineer with strong background in high-speed serial links. As a member of our dynamic team you will have the rare and rewarding opportunity to work on upcoming products that will surprise and delight millions of Apples customers every day. nnAnd all of this while enjoying a great culture where you own your career.

Ownership of SerDes system bring-up validation and debug. This will involve a SerDes bring up in system environment verifying basic operations analyzing robustness and margins in system. Work with design teams to understand the architecture and define DFT needs to help enhance testability and first-time silicon success. Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.

BS and a minimum of 10 years relevant industry experience

Able to think outside of the box and come up with creative solutions for system of system level considerations e.g. ESD knowledgeable about and experienced with common high-speed SerDes protocols (e.g. PCIe USB UCIe OIF etc.).nnExperience with system bring-up of high-speed serial links lab testing and defining equipment knowledgeable in scripting (e.g. python C Matlab) for automation of validation efforts. nnExperience with system level S/W setup. nnExperience in mixed-signal circuit pre-silicon verification and ability to closely work with circuit design of DFT to aid in the system in leading mixed-signal SerDes system with silicon bring-up debug and production of SerDes design and architecture including CDR and of with Tx/Rx equalization techniques and of link jitter budget for high-speed serial links and key block level of ADC based links and equalization with PCB design and communication teamwork and problem-solving skills. nnProven track record of delivering under difficult debug and validation scenarios.