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Senior AnalogMixed Signal Engineer


Job Location:

Boston, NH - USA

Monthly Salary: Not provided by the employer
Posted: 24 September 2026 (Yesterday)
Application Deadline: 22 December 2026
Vacancies: 1 Vacancy

Job Summary

Senior Analog/Mixed Signal Engineer

Company: Extropic
Location: Boston MA (hybrid 3 days in office)
Compensation: $160000 - $300000 competitive equity
Employment Type: Full-time
Visa Sponsorship: Visa transfers and new sponsorship (H-1B TN)

About Extropic

Extropic is building thermodynamic computing a new compute paradigm that uses thermal noise in CMOS devices to perform probabilistic computation with radical power efficiency (potentially 10000x savings over traditional approaches). Its founders former Google Quantum Computing researchers spent years fighting thermal noise before realizing they could harness it.

Founded in 2022 Extropic has about 30 people has taped out its third chip (Z1) and is defining the architecture for three more. It has raised a $14.1M seed.

The Role

Extropic is hiring a Senior Analog/Mixed Signal Engineer (3-5 years) to design and implement critical circuit building blocks for its thermodynamic computing chips. The team just taped out its third chip a 250000 p-bit fabric and is defining three more. You will work across analog mixed-signal and probabilistic circuit domains in a fast-moving startup where everyone gets hands-on.

What You Will Do
  • Design analog and mixed-signal blocks: ADCs PLLs bandgaps regulators oscillators high-speed dividers and SerDes.
  • Own block-level design across chips from architecture and schematic through layout and tape-out verification (DRC ERC LVS).
  • Do hands-on layout and comprehensive Cadence simulation (PEX Monte Carlo corner analysis).
  • Support lab testing and validation of mixed-signal circuits.
  • Work across IC systems physics and algorithms teams to take thermodynamic sampling units from concept to silicon.
What You Bring
  • 3-5 years of analog/mixed-signal IC design
  • Block-level design through tape-out
  • Cadence Virtuoso layout and simulation (PEX Monte Carlo corners)
  • CMOS process experience (FinFET 28nm 65nm)
  • Lab validation skills
  • Ability to work hybrid 3 days a week in Boston
Tech Stack

Cadence Virtuoso CMOS (FinFET 28nm 65nm) PEX Monte Carlo simulation corner analysis Python C


REVENUE: 20% of first-year salary. Est. fee per hire $32K-$60K; 2 seat(s) up to $92K if all filled.

TARGET COMPANIES (suggested): Apple Qualcomm Analog Devices Texas Instruments Broadcom Intel.

BEST-FIT CANDIDATE: 3-5 yrs; analog/MS IC blocks; Cadence tapeout; visa: transfers new H-1B/TN; location: Boston hybrid 3 days.