Enter a job title or keyword
RTL Design Engineer
Job Location:
Job Location:
Mountain View, CA - USA
Yearly Salary:
USD 80000 - 160000
Yearly Salary:
Posted:
3 November 2026 (8 hours ago)
Posted:
Application Deadline:
31 January 2027
Application Deadline:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
Wipro Limited (NYSE: WIT BSE: 507685 NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting design engineering and operations we help clients realize their boldest ambitions and build future-ready sustainable businesses. With over 230000 employees and business partners across 65 countries we deliver on the promise of helping our customers colleagues and communities thrive in an ever-changing world. For additional information visit us at . Mandatory Skills: RTL coding. Experience: 5-8 Years.The expected compensation for this role ranges from $80000 to $160000 . Final compensation will depend on various factors including your geographical location minimum wage obligations skills and relevant experience. Based on the position the role is also eligible for Wipros standard benefits including a full range of medical and dental benefits options disability insurance paid time off (inclusive of sick leave) other paid and unpaid leave options. Applicants are advised that employment in some roles may be conditioned on successful completion of a post-offer drug screening subject to applicable state law. Wipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race color religion age sex national origin disability status genetics protected veteran status sexual orientation gender identity or expression or any other characteristic protected by federal state or local laws. Applications from veterans and people with disabilities are explicitly welcome. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them we need people inspired by reinvention. Of yourself your career and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention.
Job Description
Role Purpose
- 9 years of related technical engineering experience
- OR Bachelors degree in Electrical Engineering Computer Engineering Computer Science or related field AND 6 years technical engineering experience or internship experience
- OR Masters degree in Electrical Engineering Computer Engineering Computer Science or related field AND 4 years technical engineering experience or internship experience
- 8 years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs related to arbitration and fabric logics for high-throughput/low-latency data transport.
- 8 years expertise in Digital Design including RTL coding in Verilog/System Verilog RTL2PD tool/flow setup/maintenance/debug: Lint/CDC/RDC/VCLP/Synthesis/Timing constraints/FEV
Additional Or Preferred Qualifications
- 15 years technical engineering experience
- OR Bachelors degree in Electrical Engineering Computer Engineering Computer Science or related field AND 12 years technical engineering experience
- OR Masters degree in Electrical Engineering Computer Engineering Computer Science or related field AND 8 years technical engineering experience
- OR Doctorate degree in Electrical Engineering Computer Engineering Computer Science or related field AND 5 years technical engineering experience.
- Track record of successful ASIC tape outs in deep sub-micron technologies
- Deep understanding of the physical design impact for each micro-architecture and work closely with PD engineers to find the best tradeoff given the performance/area/power constraints.
- Experienced on a variety of micro-architecture areas such as Complex Control Paths Memory hierarchies and standard industry interfaces such as Advanced extensible Interface (AXI).
- 5 years of experience in designing complex control logics on Network-On-Chip ASICs
- Excellent communication skills and ability to facilitate collaboration.
Required Experience:
IC
About Company
As a global leader, Wipro blends consulting and AI expertise across design, engineering and operations to accelerate business transformation and deliver future-ready technology.
