Physical Design Engineer
San Jose, CA - USA
Job Summary
As a member of our physical design team you will perform various types of physical verification checks (such as LVS DRC design-for-manufacturing u0026 design-for-yield and lithography) at the chip and block level. Youll collaborate with the CAD/Technology teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout. You will lead schedules and support cross-functional engineering efforts. Youll work on padring bump RDL design and working with the package and floorplan teams.
Strong knowledge of physical verification flows and of all aspects of ASIC physical skills to debug flow related issues and make enhancements as in industry standard tools used for physical verification such as Mentor Calibre Synopsys ICV chip tapeout experience with a track record of successful signoff.
We would like you to have 1-3 years of physical design experience with emphasis on physical design background and experience a plus.n
Required Experience:
IC
About Company
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