Design Verification Engineer Cellular SoC
Sunnyvale, CA - USA
Job Summary
You will have the opportunity to contribute to the verification effort of a set of sophisticated SOCs delivering the Cellular solution. You will integrate multiple sophisticated IP level DV environments craft highly reusable outstanding UVM based test bench implement effective coverage driven and advised test suites deploy new tools and methodologies to deliver chips that are right-first-time. By collaborating with other product development groups across Apple you can push the industry boundaries of what cellular systems can do and improve the product experience for our customers across the world!
You will learn all aspects of a large scale SOC design Sophisticated verification test benches different types of SOC architectures multiple high speed protocols industry-standard low power architecture outstanding DV methodology verification on accelerated platforms knowledge on Cellular protocol FW- HW interactions complexities of multi-chip SOC debug architecture etc.
BS is experience in SystemVerilog Python C or Java.
MS in EE or CS in Digital Design Computer Architecture Object Oriented Programming Networking Protocol is a be an extraordinary teammate with excellent communication and problem-solving skills and the desire to seek diverse challenges.
Required Experience:
IC
About Company
Ask Siri to name the most successful company in the world and it might respond: Apple. And it's not just out of familial pride. Apple consistently ranks highly in profit, revenue, market capitalization, and consumer cachet. In 2018, the company became the first reach a trillion dollar ... View more