CPU Implementation Methodology Engineer
Job Location:
Job Location:
Beaverton, OR - USA
Monthly Salary:
Not Disclosed
Monthly Salary:
Posted on:
11 hours ago
Posted on:
Vacancies:
1 Vacancy
Vacancies:
Job Summary
Imagine what you could do here. At Apple new ideas have a way of becoming extraordinary products services and customer experiences very quickly. Bring passion and dedication to your job and theres no telling what you could accomplish. Dynamic hard-working people and inspiring innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! nnApples Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.
Generate and validate new ideas create flows and methodologies around them by working with CPU Designers CAD teams and EDA tool vendors to improve PPAn Detailed analysis across partitions to understand optimization opportunitiesn Cross functional collaboration across STA library tech and post silicon teams to improve optimization during Implementationn Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Minimum BS and 3 years of relevant industry experiencenExperience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goalsnExperience with logic optimization trade-offs between area timing and power
Experience implementing high-performance and low-power CPU designsnScripting skills to interface with tools and analyze datanExperience with SAPR/PNR design flow infrastructure/scriptsnProficiency in programming and scripting (Example: Python TCL)nUnderstanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during ImplementationnStrong interpersonal skills and ability to work effectively in a dynamic team environmentnStrong understanding and experience using industry standard synthesis PnR and STA toolsnExcellent debugging and problem-solving skills
Generate and validate new ideas create flows and methodologies around them by working with CPU Designers CAD teams and EDA tool vendors to improve PPAn Detailed analysis across partitions to understand optimization opportunitiesn Cross functional collaboration across STA library tech and post silicon teams to improve optimization during Implementationn Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Minimum BS and 3 years of relevant industry experiencenExperience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goalsnExperience with logic optimization trade-offs between area timing and power
Experience implementing high-performance and low-power CPU designsnScripting skills to interface with tools and analyze datanExperience with SAPR/PNR design flow infrastructure/scriptsnProficiency in programming and scripting (Example: Python TCL)nUnderstanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during ImplementationnStrong interpersonal skills and ability to work effectively in a dynamic team environmentnStrong understanding and experience using industry standard synthesis PnR and STA toolsnExcellent debugging and problem-solving skills
Required Experience:
IC
About Company
Ask Siri to name the most successful company in the world and it might respond: Apple. And it's not just out of familial pride. Apple consistently ranks highly in profit, revenue, market capitalization, and consumer cachet. In 2018, the company became the first reach a trillion dollar ... View more
