CPU Implementation Feasibility Engineer

Imagine what you could do here. At Apple new ideas have a way of becoming extraordinary products services and customer experiences very quickly. Bring your passion and dedication and theres no telling what you could accomplish. Here dynamic people and innovative technologies are the norm the engineers on our teams have reinvented entire industries through Apple hardware. That same drive for innovation extends to how we work and to our commitment to leave the world better than we found Silicon Engineering Group (SEG) is looking for talented engineers to join our CPU implementation feasibility team. Youll help shape the next generation of Apple silicon from the earliest stages working with RTL on turning ambitious microarchitectural ideas into buildable high-performance low-power designs.

As a CPU Implementation Feasibility Engineer you will be working extensively with micro architects to help define the CPU and memory subsystem and performing feasibility experiments. Responsibilities also include but are not limited to:nn-Performing different feasibility experiments for RTL innovations and improvements that drive the next generation high performance and low power chipsn-Making area frequency performance and power trade-offsn-Driving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power performance and area n-Working with multi-functional engineering team to implement and validate physical design on the aspects of timing area power testability and reliability n-Performing different floor planning experiments to understand the microarchitectural feasibility for achieving high targets for performance power and area

BS and 10 years of relevant industry experiencenExperience with VLSI implementation on high performance designs

Deep knowledge of CPU microarchitecturenExperience with critical path closure techniquesnUnderstanding of static timing analysis and powernPhysical Design FundamentalsnImplementation experience on high performance CPU designsnUnderstanding of low power microarchitecture and implementation techniques for CPUsnExperience with Logical Equivalence checking (LEC) tools nExperience with Power analysis tools nExperience with Static Timing Analysis ToolsnDeep understanding of power performance and area tradeoffsnStrong communication and ability to influence architectural decisions with data