Lead Engineer, 3D Integration & Advanced Packaging

Since 2021 our team has been listed every year in the Top 100 Startups worth watchingin the EE Timesin 2021 and 2022 and our technology breakthroughs have been featured inThe TelegraphBBCand theNew Statesman. Our founders are internationally renowned researchers from UCL and Oxford University who have pioneered the development of qubits and quantum computing architectures. Our chairman is the co-founder of Cadence and Synopsys the two leading companies in the area of Electronic Design Automation. Were backed by a team of top-tier investors and we have recently closed ourSeries C funding of $160 million.

We bring together the brightest quantum engineers integrated circuit (IC) engineers quantum computing theoreticians and software engineers to create a unique world-leading team working together closely to maximise our combined expertise. Our collaborative and interdisciplinary culture is an ideal fit for anyone who thrives in a cutting-edge research and development environment focused on tackling big challenges and contributing to the development of scalable quantum computers based on silicon technology.

This is a rare and exciting opportunity to be an employee at a scale-up shaping the future of quantum computing. There are vast opportunities for professional growth and to make an impact within the company.

Our team of 100 is based across London Oxford San Sebastián and Sydney with our primary hub in Islington (London).

Were looking for a visionary and hands-on 3D Integration and Advanced Packaging lead to bridge the gap between cutting-edge silicon spin qubit devices and scalable quantum systems.

In this role you will build and lead a team to drive the R&D of complex multi-chip modules utilising TSVs and microbumps optimised to operate at millikelvin temperatures. This is a rare and exciting opportunity to solve the industrys toughest interconnect bottlenecks and shape the physical architecture of next-generation quantum processors.

• Recruit mentor and lead a high-performing team of packaging signal integrity materials and quantum integration engineers.

• Drive the strategy design and rapid prototyping of 3D integrated circuits and multi-chip quantum modules.

• Ensure all packaging architectures and interconnects can withstand thermal cycling down to millikelvin regimes without delamination or performance degradation.

• Own relevant operations with external foundries OSATs and research partners. Seamlessly transfer novel packaging designs to external manufacturing lines.

• Serve as the critical link between design process integration cryo R&D and quantum hardware teams to co-optimise the electrical thermal and mechanical design.

• Balance rapid R&D prototyping with a rigorous parallel focus on yield improvement failure analysis and long-term reliability.

• Masters or PhD in electrical engineering materials science physics microelectronics or related field.

• 7 years deep technical experience in 3D integration specifically with TSVs fine-pitch microbumps flip-chip bonding and/or multi-chip modules.

• Proven track record or building scaling and managing engineering teams in high-tech fast-paced environments.

• Strong experience managing technical transfers and working closely with external semiconductor foundries or advanced packaging facilities.

• Proficiency with industry-standard simulation tools (e.g. Ansys HFSS/Q3D Cadence) to model signal integrity thermal stress and mechanical behaviour.

• Direct experience with cryogenic electronics.

• Background or strong familiarity with solid-state quantum mechanics silicon spin qubits or semiconductor physics.

• Knowledge of materials behaviour (superconductors low loss dielectrics) at extreme temperatures.

• Be part of a creative world-leading team

• Competitive salary and share options scheme

• Contributory pension scheme

• Group private medical insurance scheme

• Life Assurance

• Cycle-to-work Scheme

• Central London location