Analog Design Engineer

We are looking for a highly experiencedPrincipal Analog Mixed Signal Engineerwith 12-18 years of experience in end-to-end ASIC/SoC development. The candidate will be responsible for driving the complete lifecycle of Analog and Mixed Signal IP development including architecture definition circuit design verification layout supervision tape-out silicon bring-up characterization and production support.

The ideal candidate should have successfully delivered multiple AMS IPs or SoCs to silicon and be capable of leading technical teams while working directly with customers and cross-functional stakeholders.

Key Responsibilities

Technical Leadership

• Own Analog/Mixed Signal IP and subsystem development from concept to production.
• Define architecture and technical roadmap for AMS solutions.
• Lead design reviews and technical decision-making.
• Mentor and guide AMS design teams.
• Drive engineering best practices and quality improvements.

Analog & Mixed Signal Design

Hands-on experience in designing and leading development of:

• PLL/DLL
• ADC/DAC
• Bandgap References
• LDOs and Power Management Circuits
• Oscillators and Clock Generation Circuits
• Comparators
• Charge Pumps
• High-Speed Interface Analog Blocks
• Sensor Interfaces
• Monitoring and Calibration Circuits

End-to-End Product Ownership

• Requirement analysis and feasibility studies.
• System and circuit architecture definition.
• Design implementation and optimization.
• AMS verification and sign-off.
• Layout supervision and reviews.
• Post-layout extraction and closure.
• Tape-out ownership.
• Silicon bring-up and debugging.
• Characterization and production support.

Verification & Signoff

• Define verification strategy and acceptance criteria.
• Conduct PVT Monte Carlo mismatch noise and reliability analyses.
• Drive post-layout simulations and signoff activities.
• Ensure design robustness across operating conditions.

Silicon Validation & Production Support

• Lead silicon bring-up and characterization activities.
• Correlate simulation and silicon performance.
• Debug silicon issues and recommend corrective actions.
• Support yield improvement and product qualification.

Customer & Cross-Functional Interaction

• Interface directly with customers for technical discussions.
• Collaborate with Digital Verification Physical Design Packaging Test and Product Engineering teams.
• Participate in technical reviews and project planning.

Required Technical Skills

Design Tools

• Cadence Virtuoso
• Spectre / APS
• ADE XL / Explorer / Assembler
• HSPICE
• MATLAB / Simulink (preferred)

Process Technologies

• Experience in CMOS process nodes from 180nm to advanced nodes.
• Knowledge of FinFET technologies is an advantage.

Verification Skills

• AMS Verification
• Verilog-A
• Verilog-AMS
• Mixed-Signal Simulation
• Corner Analysis
• Monte Carlo Analysis
• Reliability Analysis

Physical Verification

• DRC
• LVS
• ERC
• Parasitic Extraction
• Post-layout Simulation

Required Qualifications

• B.E./ in Electronics Electrical Engineering VLSI Microelectronics or related field.
• 12-18 years of relevant AMS design experience.
• Proven record of multiple successful silicon tape-outs.

Desired Experience

• Experience with complete ASIC/SoC development lifecycle.
• Experience in multiple successful tape-outs.
• Silicon bring-up and characterization experience.
• Customer-facing technical interaction experience.
• Knowledge of automotive industrial or safety-critical applications is desirable.

Preferred Domain Exposure

• Functional Safety (ISO 26262 / IEC 61508) exposure.
• Low-power design techniques.
• SerDes MIPI USB PCIe DDR PHY experience.
• Python Perl or TCL scripting.
• Productization and yield improvement experience.

Required Skills:

Analog Signal ProcessingSpectreVirtuosoCadence Virtuoso