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DFT Verification intern

NXP Semiconductors


Job Location:

Tianjin - China

Monthly Salary: Not provided by the employer
Posted: 25 September 2026 (5 days ago)
Application Deadline: 23 December 2026
Vacancies: 1 Vacancy

Job Summary

Job Responsibility:
-Contribute to SoC DFT design activities by running DFT pattern simulations static and dynamic checks and documentation.
-Assist with DFT AI Flow development under guidance from senior engineers.
-Contribute to engineering quality learning and teamwork throughout the development cycle.

Requirements:
-Currently pursuing a Masters degree in Electrical Engineering Electronics Computer Engineering Computer Science or a related discipline.
-Hands-on experience from ASIC EDA tools SoC design projects internships coursework or student competitions is a plus.
-Familiar with SoC digital design verification programming EDA tools; willingness to learn quickly is important.
-Strong foundation in engineering fundamentals problem solving testing and technical documentation.
-Able to collaborate with cross-functional teams and communicate technical ideas clearly.
-Good communication skills in English (written and spoken).


More information about NXP in Greater China...

#LI-6650

Required Experience:

Intern


About Company

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NXP is a global semiconductor company creating solutions that enable secure connections for a smarter world.

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